Cpu transistor viewer11/21/2023 ![]() The ADD and SUB both have variants with/without Carry. But I choose to put the inverter on the control pcb instead - thus saving seven transistors in total.ĭepending on the state of the control inputs the ALU slice does the following common functions (plus a number of strange things that I'll don't have use for). I could have put the inverter inside the slice and then I just had to distribute six control signals among the bus. One of the control inputs are required both in a normal and also in an inverted version. In addition to that there are seven control inputs that will be shared among all slices that will be used in the complete ALU. My ALU slice have the usual A, B and CarryIn inputs and a Result and CarryOut as outputs. That would not be a big issue if using ICs, just a one additional chip would be required, but when building it from discrete NAND gates it's not that simple. Usually most ALU designs have a rather big multiplexer at the output stage where one of the results of the desired operation is selected. It does both arithmetic and logical operations and the result ends up on a single output pin. It took the better part of day, but but finally I've got a low transistor count version of a single bit ALU. The ALU control pcb and the Shift/Rol pcbs I'll probably just solder up on breadboards since they're on-offs. As far as I can see it does, so I'll route pcbs for this and send them off for manufacturing. So I wired that up on a breadboard and hooked up an Arduino to automatically set the control signals and cycle through the combinations of A, B CarryIn and analyse the Result and CarryOut to see if the ALU behaves as expected. I realized that for the shift/rol instructions I need to be able to disable the Result and CarryOut ports of the ALU slices so there's now one additional control input to the slices and one more diode each for the two output gates. The boards look a bit like the SIP (Single In Line Package) memory modules that was used for some years back in the 90's. Three boards each with six 4-input NAND gates giving 18 NANDs in total which is more than enough to wire up one ALU Slice and verify that it actually works in real life and not just in Logisim. One ALU Slice tested with real hardware matseng.So I need to work on getting the speed up quite a bit before I send for any of the PCBs I've designed the last two weeks. 550 KHz at 3.3 volts and 720 Khz at 2.5 volts.īut this still about an order of magnitude slower than simulated. Very slow and basically unusable for building the four-phase clock generator for the CPU. ![]() The LED/Si version only worked up to 180 KHz at 3.3 volts, when lowered to 2.5 volts the max speed rose to 210 KHz. The LED/Si version was just a little bit slower than the 2Si/Sch, just a few % difference.īut in real hardware the story was quite a bit different. When simulated in LTspice both version can (when configure as divide-by-2's) can work up to a bit more than 4 MHz. The second version is more standard, using dual silicon diodes as level shifter and a BAT54 Schottky as the Baker clamp. The first version used a single LED as the level shifter and a silicon diode as the Bake Clamp. The general schematics for NAND based Edge Triggered D FlipFlip Now when I'm back home with a lab a bit larger than a single small desk I soldered up two versions of a edge triggered D FlipFlop.
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